1. Field of the Invention
The present invention relates to an imaging device and an imaging method.
Priority is claimed on Japanese Patent Application No. 2012-278484, filed Dec. 20, 2012, the content of which is incorporated herein by reference.
2. Description of Related Art
In recent years, with increases in resolution and performance of imaging devices such as digital still cameras or video cameras, more complicated image processing at a higher speed is required at the time of photography. For this reason, for example, Japanese Unexamined Patent Application, First Publication No. 2004-289631 discloses a technology for performing image processing at a high speed. According to the technology disclosed in Japanese Unexamined Patent Application, First Publication No. 2004-289631, a region (hereinafter referred to as an “imaged region”) imaged by a solid-state imaging device included in an imaging device is divided into a plurality of regions and a plurality of image processing circuits corresponding to the divided regions perform image processing in parallel, so that a processing time of the image processing necessary to generate one photographed image can be shortened.
FIGS. 6A, 6B, and 6C are diagrams illustrating an example of a method of shortening a time necessary for image processing in an imaging device according to the related art. FIGS. 6A, 6B, and 6C show a difference in the processing time necessary for the image processing performed by the imaging device according to a difference in the number of image processing circuits included in the imaging device.
When the imaging device includes only one image processing circuit, as illustrated in FIG. 6A, the one image processing circuit performs image processing on the entire imaged region, that is, performs the image processing corresponding to the number of pixels included in the solid-state imaging device. On the other hand, when the imaging device includes two image processing circuits, as illustrated in FIG. 6B, the imaged region is divided into two equal regions (regions X and Y). Image processing circuits X and Y included in the imaging device may perform the image processing on the corresponding regions in parallel. That is, the image processing circuits X and Y each perform the imaging process on half of the number of pixels in the solid-state imaging device. Accordingly, as illustrated in FIG. 6C, it is possible to shorten the processing time necessary for the imaging device to perform image processing.
FIG. 6C shows an example in which the processing time in the case in which the one image processing circuit performs the image processing on the entire imaged region, as illustrated in FIG. 6A is compared to the processing time in the case in which the two image processing circuits X and Y perform the image processing on the divided imaged regions in parallel, as illustrated in FIG. 6B. As illustrated in FIG. 6C, the processing time necessary for the image processing is halved when the image processing circuits X and Y respectively perform the image processing on the regions, which are imaged regions X and Y equally divided from the imaged region, in parallel compared to the case in which one image processing circuit performs the image processing on the entire imaged region rather than dividing the imaged region. Accordingly, a throughput from imaging performed by the imaging device to completion of the image processing performed to generate one photographed image is doubled, and thus it is possible to realize a high speed imaging device.
Recent imaging devices are configured to have a photography assistance (supporting) function such as a camera-shake correction function. Therefore, recent imaging devices do not perform the image processing on the entire imaged region imaged by a solid-state imaging device, and generally perform image processing on a region partially cut from an imaged region in consideration of the fact that a position (hereinafter referred to as a “photography position”) at which the solid-state imaging device images a subject is shaken in the imaged region due to camera shake.
FIGS. 7A, 7B, 7C, 7D, and 7E are diagrams illustrating an example of a relation between a change in a region caused due to camera shake in an imaging device according to the related art and a time necessary for image processing. When camera shake occurs in directions of arrows illustrated in FIGS. 7A and 7B at the time of photography by the imaging device, a partial region (hereinafter referred to as a “processed region”) necessary to perform image processing in order to generate one photographed image is moved in an opposite direction to the direction in which the camera shake occurs, as in a processed region Z illustrated in FIGS. 7A and 7B. Since an amount or a direction of camera shake differs for each frame photographed by the imaging device, a cutout position of the processed region at which the image processing is performed also differs for each frame photographed by the imaging device.
For this reason, when camera shake occurs and an imaged region imaged by a solid-state imaging device is simply divided into two equal regions, as in Japanese Unexamined Patent Application, First Publication No. 2004-289631, the sizes (areas) of the processed regions Z included in the regions X and Y may not be equal, as illustrated in FIGS. 7C and 7D. Accordingly, allocation amounts of the image processing allocated to the image processing circuits X and Y may not be equal.
Further, when the allocation amounts of the image processing allocated to the image processing circuits X and Y are not equal, processing times of the image processing performed on the regions X and Y to which the image processing circuits X and Y correspond may differ from each other, as illustrated in FIG. 7E. FIG. 7E shows an example in which the processing time of the image processing circuit X is compared to the processing time of the image processing circuit Y when the image processing is allocated to the ranges of the processed regions Z of the image processing circuits X and Y, as illustrated in FIG. 7D.
When the processing times of the image processing circuits X and Y differ from each other, as illustrated in FIG. 7E, a time necessary until the image processing circuit X to which the greater allocation amount of the image processing is allocated completes the image processing, that is, the processing time of the image processing circuit X in the imaging device, may be a time necessary for image processing of one frame. From the viewpoint of the image processing on each frame, the frame rate, and accordingly the processing performance, of the imaging device may deteriorate.